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74AUP1G06GW-Q100,125

NXP Semiconductors

74AUP1G06GW-Q100,125 by NXP Semiconductors

NXP Semiconductors' 74AUP1G06GW-Q100,125 is a CMOS logic gate with 5 terminals. It operates b/w -40 to 125 °C and has a propagation delay of 21.3 ns. Designed for automotive applications, it features an open-drain output and AEC-Q100 screening level.

Median Price

$0.069

Lifecycle Status

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7

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1k+

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Rochester

USA . 43,797 parts In-Stock

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Digiode

USA . 3,397 parts In-Stock

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DigiKey Marketplace

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Vyrian

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Nova Conductors

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Semicontronic

India . 43,602 parts In-Stock

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Corphita

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Ampacity Inc.

Singapore . 43,729 parts In-Stock

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Microchip USA

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Corohmni

South Africa . 377 parts In-Stock

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AZTECH Wire

Italy . 639 parts In-Stock

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Continental Prestige Electronics

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Overview

Unlock the potential of your automotive electronics with the high-quality 74AUP1G06GW-Q100,125 logic gate from NXP Semiconductors. Designed to meet AEC-Q100 standards, this small yet powerful component boasts a nominal supply voltage of 1.1V and a minimal propagation delay of 21.3ns, making it ideal for a wide range of applications in the automotive industry. With its reliable performance and robust construction, this logic gate offers customers unparalleled value and peace of mind, ensuring seamless operation in even the most demanding environments. Elevate your designs with NXP Semiconductors - empowering innovation every step of the way.

Feature Benefit Bullets

Package Body Material: PLASTIC/EPOXY

Plastic material makes the package lightweight and durable, suitable for automotive applications.

Surface Mount: YES

Easy to mount on a circuit board, saving space and facilitating automated assembly processes.

Nominal Supply Voltage / Vsup (V): 1.1

Operates at a standard supply voltage, compatible with many electronic systems.

Propagation Delay (tpd): 21.3 ns

Fast propagation delay ensures quick signal processing and efficient operation.

Output Characteristics: OPEN-DRAIN

Open-drain output allows for easy interfacing with other components and flexibility in circuit design.

Minimum Operating Temperature: -40 °C

Works reliably in extreme cold conditions, making it suitable for automotive and industrial environments.

Maximum Operating Temperature: 125 °C

Can withstand high temperatures, ensuring stable performance in harsh operating conditions.

Technology: CMOS

CMOS technology offers low power consumption and high noise immunity, ideal for energy-efficient designs.

Technical Specifications

Logic Gates 74AUP1G06GW-Q100,125 attributes and parameters. Explore more Logic Gates devices from NXP Semiconductors

Specs

Family:

AUP/ULP/V

JESD-30 Code:

R-PDSO-G5

Length:

2.05 mm

Logic IC Type:

No. of Functions:

1

No. of Inputs:

1

No. of Terminals:

5

Maximum Operating Temperature:

125 Cel

Minimum Operating Temperature:

-40 Cel

Output Characteristics:

OPEN-DRAIN

Package Body Material:

PLASTIC/EPOXY

Package Code:

Package Shape:

Package Style (Meter):

SMALL OUTLINE, THIN PROFILE, SHRINK PITCH

Propagation Delay (tpd):

21.3 ns

Screening Level:

AEC-Q100

Maximum Seated Height:

1.1 mm

Maximum Supply Voltage (Vsup):

3.6 V

Minimum Supply Voltage (Vsup):

.8 V

Nominal Supply Voltage / Vsup (V):

1.1

Surface Mount:

YES

Technology:

CMOS

Temperature Grade:

Terminal Form:

Terminal Pitch:

.65 mm

Terminal Position:

DUAL

Width:

1.25 mm

Trade Compliance

74AUP1G06GW-Q100,125 Logic ICs trade compliance attributes, and parameters.

HTS

8542.39.00.01

SB

8542.39.00.00

Manufacturer Highlights

NXP Semiconductors

NXP is a leading semiconductor company that creates cutting-edge technology to power secure connections in a smarter world. Founded in 2006, they have grown to become one of the top five global semiconductor companies and serve their customers in over 70 countries around the world.

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Management team

Executive Director, President, CEO

Kurt Sievers

Executive VP, CFO

Bill Betz

Executive VP, Chief Sales Officer

Ron Martino

Manufacturer fab locations 7

Fab name Location Fab Initiation Wafer Capacity

ICN8

Fabrication

Fab Initiation

1996

Netherlands

Nijmegen

Wafer Capacity

55,000

1996

55,000

ATMC (Austin Tech & Mfg Center)

Fabrication

Fab Initiation

1995

USA

Austin

Wafer Capacity

30,000

1995

30,000

N/A

Fabrication

Fab Initiation

1989

Germany

Boeblingen

Wafer Capacity

1989

CHD

Fabrication

Fab Initiation

1993

USA

Chandler

Wafer Capacity

30,000

1993

30,000

OHTC

Fabrication

Fab Initiation

1991

USA

Austin

Wafer Capacity

24,000

1991

24,000

New Expansion Fab

Fabrication

Fab Initiation

2026

USA

Austin

Wafer Capacity

2026

ECHO

Fabrication

Fab Initiation

2020

USA

Chandler

Wafer Capacity

10,000

2020

10,000

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