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74AUP1G08GW-Q100,125

NXP Semiconductors

74AUP1G08GW-Q100,125 by NXP Semiconductors

NXP Semiconductors' 74AUP1G08GW-Q100,125 is a CMOS Logic Gate with 2 inputs and 24ns propagation delay. AEC-Q100 screened for automotive use, it operates b/w -40 to 125 °C. With a small outline package style, it's ideal for compact electronic applications.

Median Price

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Lifecycle Status

Suppliers In-Stock

5

In-Stock Inventory

1k+

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Digiode

USA . 4,298 parts In-Stock

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Anansix

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Vyrian

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Nova Conductors

Japan . 10 parts In-Stock

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Microchip USA

USA . 2,145 parts In-Stock

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AZTECH Wire

Italy . 308 parts In-Stock

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Corohmni

South Africa . 269 parts In-Stock

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Ampacity Inc.

Singapore . 1,619 parts In-Stock

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One Stop Electronics

USA . 285 parts In-Stock

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Spain . 6,278 parts In-Stock

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Continental Prestige Electronics

USA . 5,714 parts In-Stock

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Argo Parts USA

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Corphita

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Bastille Electronics

Australia . 200 parts In-Stock

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Overview

Elevate your automotive electronics with the 74AUP1G08GW-Q100,125 by NXP Semiconductors. This logic gate offers unparalleled quality and reliability, as well as a wide range of applications in various automotive systems. With NXP Semiconductors' reputation for excellence, you can trust that this product will deliver exceptional performance and durability. Experience the value and benefits of seamless integration, efficient operation, and enhanced functionality in your automotive designs. Upgrade to the 74AUP1G08GW-Q100,125 and take your projects to new heights.

Feature Benefit Bullets

Package Body Material: PLASTIC/EPOXY

Plastic body material provides durability and protection for the internal components of the logic gate, ensuring a longer lifespan.

Surface Mount: YES

Surface mount technology allows for easy and efficient installation on circuit boards, saving time and effort during production.

Screening Level: AEC-Q100

AEC-Q100 screening ensures high quality and reliability, making this logic gate suitable for automotive applications where robustness is crucial.

Package Shape: RECTANGULAR

Rectangular package shape helps in easy placement and alignment on the circuit board, improving installation efficiency.

Nominal Supply Voltage / Vsup (V): 1.1

Operating at a nominal supply voltage of 1.1V makes this logic gate energy efficient and suitable for low power applications.

Propagation Delay (tpd): 24 ns

With a low propagation delay of 24 ns, this logic gate ensures fast signal processing and high-speed operation.

Maximum Operating Temperature: 125 °C

High maximum operating temperature of 125°C allows for reliable performance in demanding environments.

Technology: CMOS

CMOS technology offers low power consumption and high noise immunity, making this logic gate efficient and reliable for various applications.

Technical Specifications

Logic Gates 74AUP1G08GW-Q100,125 attributes and parameters. Explore more Logic Gates devices from NXP Semiconductors

Specs

Family:

AUP/ULP/V

JESD-30 Code:

R-PDSO-G5

Length:

2.05 mm

Logic IC Type:

No. of Functions:

1

No. of Inputs:

2

No. of Terminals:

5

Maximum Operating Temperature:

125 Cel

Minimum Operating Temperature:

-40 Cel

Package Body Material:

PLASTIC/EPOXY

Package Code:

Package Shape:

Package Style (Meter):

SMALL OUTLINE, THIN PROFILE, SHRINK PITCH

Propagation Delay (tpd):

24 ns

Screening Level:

AEC-Q100

Maximum Seated Height:

1.1 mm

Maximum Supply Voltage (Vsup):

3.6 V

Minimum Supply Voltage (Vsup):

.8 V

Nominal Supply Voltage / Vsup (V):

1.1

Surface Mount:

YES

Technology:

CMOS

Temperature Grade:

Terminal Form:

Terminal Pitch:

.65 mm

Terminal Position:

DUAL

Width:

1.25 mm

Trade Compliance

74AUP1G08GW-Q100,125 Logic ICs trade compliance attributes, and parameters.

HTS

8542.39.00.01

SB

8542.39.00.00

Manufacturer Highlights

NXP Semiconductors

NXP is a leading semiconductor company that creates cutting-edge technology to power secure connections in a smarter world. Founded in 2006, they have grown to become one of the top five global semiconductor companies and serve their customers in over 70 countries around the world.

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Management team

Executive Director, President, CEO

Kurt Sievers

Executive VP, CFO

Bill Betz

Executive VP, Chief Sales Officer

Ron Martino

Manufacturer fab locations 7

Fab name Location Fab Initiation Wafer Capacity

ICN8

Fabrication

Fab Initiation

1996

Netherlands

Nijmegen

Wafer Capacity

55,000

1996

55,000

ATMC (Austin Tech & Mfg Center)

Fabrication

Fab Initiation

1995

USA

Austin

Wafer Capacity

30,000

1995

30,000

N/A

Fabrication

Fab Initiation

1989

Germany

Boeblingen

Wafer Capacity

1989

CHD

Fabrication

Fab Initiation

1993

USA

Chandler

Wafer Capacity

30,000

1993

30,000

OHTC

Fabrication

Fab Initiation

1991

USA

Austin

Wafer Capacity

24,000

1991

24,000

New Expansion Fab

Fabrication

Fab Initiation

2026

USA

Austin

Wafer Capacity

2026

ECHO

Fabrication

Fab Initiation

2020

USA

Chandler

Wafer Capacity

10,000

2020

10,000

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