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74LVC1G04GW

NXP Semiconductors

74LVC1G04GW by NXP Semiconductors

NXP Semiconductors' 74LVC1G04GW logic gate has a propagation delay of 5.5ns at 3.3V, suitable for automotive applications. With a load capacitance of 50pF, it operates in temperatures ranging from -40 to 125°C. This surface-mount device features a small outline package with dual terminals and tin finish.

Median Price

$0.023

Lifecycle Status

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29

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1k+

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Chip1Stop

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Maritex

Poland . 246 parts In-Stock

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Sensible Micro Corp

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Connector Distribution Corp

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LIBRA Elektronik GmbH

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Semicontronic

India . 35,850 parts In-Stock

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Ampacity Inc.

Singapore . 35,600 parts In-Stock

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AZTECH Wire

Italy . 12,841 parts In-Stock

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South Africa . 748 parts In-Stock

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Advanced Electronics

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Overview

Discover the power of innovation with the 74LVC1G04GW logic gate by NXP Semiconductors. This compact and reliable component delivers fast signal processing while maintaining high quality standards. Ideal for a wide range of applications, from consumer electronics to automotive systems, this logic gate offers exceptional value and performance. Trust NXP Semiconductors to provide superior technology that brings efficiency and reliability to your designs.

Feature Benefit Bullets

Package Body Material: PLASTIC/EPOXY

PLastic/Epoxy material makes the package durable and resistant to damage, ensuring the longevity of the product.

Propagation Delay At Nominal Supply: 5.5 ns

Low propagation delay allows for quick response time, making the logic gates suitable for high-speed applications.

Surface Mount: YES

Surface mount capability makes the installation of the logic gates easier and more convenient.

Propagation Delay: 9.5 ns

Low propagation delay ensures efficient signal transmission within the logic gates, enhancing performance.

Maximum Operating Temperature: 125 °C

High maximum operating temperature allows the logic gates to function reliably in a wide range of environmental conditions.

Minimum Operating Temperature: -40 °C

Wide range of minimum operating temperature ensures the logic gates can operate in both extreme cold and hot conditions.

Technology: CMOS

CMOS technology provides low power consumption and high noise immunity, making the logic gates energy-efficient and reliable.

Technical Specifications

Logic Gates 74LVC1G04GW attributes and parameters. Explore more Logic Gates devices from NXP Semiconductors

Specs

Family:

LVC/LCX/Z

JESD-30 Code:

R-PDSO-G5

JESD-609 Code:

e3

Length:

2.05 mm

Load Capacitance (CL):

50 pF

Logic IC Type:

Maximum I (ol):

24 Amp

Moisture Sensitivity Level (MSL):

1

No. of Functions:

1

No. of Inputs:

1

No. of Terminals:

5

Maximum Operating Temperature:

125 Cel

Minimum Operating Temperature:

-40 Cel

Package Body Material:

PLASTIC/EPOXY

Package Code:

Package Equivalence Code:

TSSOP5/6,.08

Package Shape:

Package Style (Meter):

SMALL OUTLINE, THIN PROFILE, SHRINK PITCH

Packing Method:

TR

Peak Reflow Temperature (C):

260

Power Supplies (V):

3.3

Propagation Delay At Nominal Supply:

5.5 ns

Propagation Delay (tpd):

9.5 ns

Qualification:

Not Qualified

Schmitt Trigger:

NO

Maximum Seated Height:

1.1 mm

Sub-Category:

Gates

Maximum Supply Voltage (Vsup):

5.5 V

Minimum Supply Voltage (Vsup):

1.65 V

Nominal Supply Voltage / Vsup (V):

3.3

Surface Mount:

YES

Technology:

CMOS

Temperature Grade:

Terminal Finish:

Tin (Sn)

Terminal Form:

Terminal Pitch:

.65 mm

Terminal Position:

DUAL

Maximum Time At Peak Reflow Temperature (s):

30

Width:

1.25 mm

Trade Compliance

74LVC1G04GW Logic ICs trade compliance attributes, and parameters.

ECCN

EAR99

ECCN Governance

EAR

HTS

8542.39.00.01

SB

8542.39.00.00

Manufacturer Highlights

NXP Semiconductors

NXP is a leading semiconductor company that creates cutting-edge technology to power secure connections in a smarter world. Founded in 2006, they have grown to become one of the top five global semiconductor companies and serve their customers in over 70 countries around the world.

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The material and information contained is this video is for educational and general information purposes. All rights remain with respective rightsholders. Fair Use Statement

Management team

Executive Director, President, CEO

Kurt Sievers

Executive VP, CFO

Bill Betz

Executive VP, Chief Sales Officer

Ron Martino

Manufacturer fab locations 7

Fab name Location Fab Initiation Wafer Capacity

ICN8

Fabrication

Fab Initiation

1996

Netherlands

Nijmegen

Wafer Capacity

55,000

1996

55,000

ATMC (Austin Tech & Mfg Center)

Fabrication

Fab Initiation

1995

USA

Austin

Wafer Capacity

30,000

1995

30,000

N/A

Fabrication

Fab Initiation

1989

Germany

Boeblingen

Wafer Capacity

1989

CHD

Fabrication

Fab Initiation

1993

USA

Chandler

Wafer Capacity

30,000

1993

30,000

OHTC

Fabrication

Fab Initiation

1991

USA

Austin

Wafer Capacity

24,000

1991

24,000

New Expansion Fab

Fabrication

Fab Initiation

2026

USA

Austin

Wafer Capacity

2026

ECHO

Fabrication

Fab Initiation

2020

USA

Chandler

Wafer Capacity

10,000

2020

10,000

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