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UPD411000LA-15

Renesas Electronics

UPD411000LA-15 by Renesas Electronics

PAGE MODE DRAM; Temperature Grade: COMMERCIAL; No. of Terminals: 20; Package Code: SOJ; Refresh Cycles: 512; Package Shape: RECTANGULAR;

Median Price

-

Lifecycle Status

Suppliers In-Stock

0

In-Stock Inventory

< 1k

Technical Specifications

DRAM UPD411000LA-15 attributes and parameters. Explore more DRAM devices from Renesas Electronics

Specs

Maximum Access Time:

150 ns

Input/Output Type:

SEPARATE

JESD-30 Code:

R-PDSO-J20

JESD-609 Code:

e0

Memory Density:

1048576 bit

Memory IC Type:

Memory Width:

1

No. of Terminals:

20

No. of Words:

1048576 words

No. of Words Code:

1M

Maximum Operating Temperature:

70 Cel

Minimum Operating Temperature:

0 Cel

Organization:

1MX1

Output Characteristics:

3-STATE

Package Body Material:

PLASTIC/EPOXY

Package Code:

SOJ

Package Equivalence Code:

SOJ20/26,.34

Package Shape:

Package Style (Meter):

SMALL OUTLINE

Power Supplies (V):

5

Qualification:

Not Qualified

Refresh Cycles:

512

Sub-Category:

DRAMs

Maximum Supply Current:

80 mA

Nominal Supply Voltage / Vsup (V):

5

Surface Mount:

YES

Technology:

MOS

Temperature Grade:

Terminal Finish:

Tin/Lead (Sn/Pb)

Terminal Form:

J BEND

Terminal Pitch:

1.27 mm

Terminal Position:

DUAL

Trade Compliance

UPD411000LA-15 Memory ICs trade compliance attributes, and parameters.

ECCN

EAR99

ECCN Governance

EAR

HTS

8542.32.00.02

SB

8542.32.00.15

Manufacturer Highlights

Renesas Electronics

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