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7206L15DG

Renesas Electronics

7206L15DG by Renesas Electronics

BI-DIRECTIONAL FIFO; Temperature Grade: COMMERCIAL; No. of Terminals: 28; Package Code: DIP; Package Shape: RECTANGULAR; JESD-30 Code: R-GDIP-T28;

Median Price

-

Lifecycle Status

Suppliers In-Stock

0

In-Stock Inventory

< 1k

Distributors (Availability)

Supplier In-Stock 1+ parts 100+ parts 1k+ parts 10k+ parts

Northwest PG Solutions

USA . 576 parts In-Stock

1+ parts

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100+ parts

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1k+ parts

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10k+ parts

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576

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-

-

Native Components

USA . 409 parts In-Stock

1+ parts

-

100+ parts

-

1k+ parts

-

10k+ parts

-

409

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Technical Specifications

FIFO 7206L15DG attributes and parameters. Explore more FIFO devices from Renesas Electronics

Specs

Maximum Access Time:

15 ns

Maximum Clock Frequency (fCLK):

40 MHz

Cycle Time:

25 ns

JESD-30 Code:

R-GDIP-T28

JESD-609 Code:

e3

Memory Density:

147456 bit

Memory IC Type:

Memory Width:

9

No. of Functions:

1

No. of Terminals:

28

No. of Words:

16384 words

No. of Words Code:

16K

Operating Mode:

ASYNCHRONOUS

Maximum Operating Temperature:

70 Cel

Minimum Operating Temperature:

0 Cel

Organization:

16KX9

Output Characteristics:

3-STATE

Output Enable:

NO

Package Body Material:

CERAMIC, GLASS-SEALED

Package Code:

DIP

Package Shape:

Package Style (Meter):

IN-LINE

Parallel or Serial:

PARALLEL

Power Supplies (V):

5

Qualification:

Not Qualified

Maximum Standby Current:

.012 Amp

Sub-Category:

FIFOs

Maximum Supply Current:

120 mA

Maximum Supply Voltage (Vsup):

5.5 V

Minimum Supply Voltage (Vsup):

4.5 V

Nominal Supply Voltage / Vsup (V):

5

Surface Mount:

NO

Technology:

CMOS

Temperature Grade:

Terminal Finish:

MATTE TIN

Terminal Form:

THROUGH-HOLE

Terminal Position:

DUAL

Trade Compliance

7206L15DG Memory ICs trade compliance attributes, and parameters.

ECCN

EAR99

ECCN Governance

EAR

HTS

8542.32.00.71

SB

8542.32.00.70

Manufacturer Highlights

Renesas Electronics

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