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74LVC1G74DC-Q100,125

NXP Semiconductors

74LVC1G74DC-Q100,125 by NXP Semiconductors

NXP Semiconductors' 74LVC1G74DC-Q100,125 is a CMOS latch with 13.4 ns propagation delay and operates b/w -40 to 125 °C. It features positive edge trigger, complementary output polarity, and AEC-Q100 screening level for automotive applications.

Median Price

$0.190

Lifecycle Status

Suppliers In-Stock

7

In-Stock Inventory

1k+

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Rochester

USA . 51,078 parts In-Stock

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Chip Stock

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Digiode

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Vyrian

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Anansix

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Nova Conductors

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Microchip USA

USA . 2,908 parts In-Stock

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AZTECH Wire

Italy . 896 parts In-Stock

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Semicontronic

India . 220 parts In-Stock

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$16.490

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Corohmni

South Africa . 361 parts In-Stock

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One Stop Electronics

USA . 1,462 parts In-Stock

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Ampacity Inc.

Singapore . 1,491 parts In-Stock

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Continental Prestige Electronics

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Corphita

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Argo Parts USA

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Bastille Electronics

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Overview

Unlock the potential of your automotive electronics with the 74LVC1G74DC-Q100,125 by NXP Semiconductors. This top-quality latch and flip-flop device offers reliable performance, high-speed operation, and compatibility with a wide range of applications. With a compact design and advanced CMOS technology, this product delivers exceptional value and efficiency. Trust NXP Semiconductors to provide cutting-edge solutions for your automotive electronics needs.

Feature Benefit Bullets

Package Body Material: PLASTIC/EPOXY

Plastic/Epoxy material provides durability and protection for the internal components of the latch or flip-flop.

Surface Mount: YES

Surface mount capability allows for easier and more efficient installation on circuit boards.

Screening Level: AEC-Q100

AEC-Q100 screening level indicates high reliability and quality standards suitable for automotive applications.

Propagation Delay: 13.4 ns

Low propagation delay ensures fast signal processing and response time.

Maximum Operating Temperature: 125 °C

High maximum operating temperature allows for reliable operation in a variety of environments.

Trigger Type: POSITIVE EDGE

Positive edge trigger type ensures precise timing control for triggering the latch or flip-flop.

Technology: CMOS

CMOS technology offers low power consumption and high noise immunity for efficient operation.

Minimum fmax: 200 MHz

High minimum frequency ensures compatibility with high-speed applications.

Technical Specifications

Latches & Flip-Flops 74LVC1G74DC-Q100,125 attributes and parameters. Explore more Latches & Flip-Flops devices from NXP Semiconductors

Specs

Family:

LVC/LCX/Z

JESD-30 Code:

R-PDSO-G8

Length:

2.3 mm

Logic IC Type:

No. of Bits:

1

No. of Functions:

1

No. of Terminals:

8

Maximum Operating Temperature:

125 Cel

Minimum Operating Temperature:

-40 Cel

Output Polarity:

COMPLEMENTARY

Package Body Material:

PLASTIC/EPOXY

Package Code:

Package Shape:

Package Style (Meter):

SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH

Propagation Delay (tpd):

13.4 ns

Screening Level:

AEC-Q100

Maximum Seated Height:

1 mm

Maximum Supply Voltage (Vsup):

5.5 V

Minimum Supply Voltage (Vsup):

1.65 V

Nominal Supply Voltage / Vsup (V):

1.8

Surface Mount:

YES

Technology:

CMOS

Temperature Grade:

Terminal Form:

Terminal Pitch:

.5 mm

Terminal Position:

DUAL

Trigger Type:

POSITIVE EDGE

Width:

2 mm

Minimum fmax:

200 MHz

Trade Compliance

74LVC1G74DC-Q100,125 Logic ICs trade compliance attributes, and parameters.

HTS

8542.39.00.01

SB

8542.39.00.00

Manufacturer Highlights

NXP Semiconductors

NXP is a leading semiconductor company that creates cutting-edge technology to power secure connections in a smarter world. Founded in 2006, they have grown to become one of the top five global semiconductor companies and serve their customers in over 70 countries around the world.

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Management team

Executive Director, President, CEO

Kurt Sievers

Executive VP, CFO

Bill Betz

Executive VP, Chief Sales Officer

Ron Martino

Manufacturer fab locations 7

Fab name Location Fab Initiation Wafer Capacity

ICN8

Fabrication

Fab Initiation

1996

Netherlands

Nijmegen

Wafer Capacity

55,000

1996

55,000

ATMC (Austin Tech & Mfg Center)

Fabrication

Fab Initiation

1995

USA

Austin

Wafer Capacity

30,000

1995

30,000

N/A

Fabrication

Fab Initiation

1989

Germany

Boeblingen

Wafer Capacity

1989

CHD

Fabrication

Fab Initiation

1993

USA

Chandler

Wafer Capacity

30,000

1993

30,000

OHTC

Fabrication

Fab Initiation

1991

USA

Austin

Wafer Capacity

24,000

1991

24,000

New Expansion Fab

Fabrication

Fab Initiation

2026

USA

Austin

Wafer Capacity

2026

ECHO

Fabrication

Fab Initiation

2020

USA

Chandler

Wafer Capacity

10,000

2020

10,000

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