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SN74AUP1G80DCKTG4

Texas Instruments

SN74AUP1G80DCKTG4 by Texas Instruments

SN74AUP1G80DCKTG4 by Texas Instruments is a CMOS latch with 28.7 ns propagation delay, 30 pF load capacitance, and 260 MHz max frequency. It operates at a supply voltage of 1.2V/3.3V and is ideal for industrial applications requiring positive edge triggering in a compact thin profile package.

Median Price

-

Lifecycle Status

Suppliers In-Stock

2

In-Stock Inventory

1k+

Distributors (In-Stock)

Supplier In-Stock 1+ parts 100+ parts 1k+ parts 10k+ parts

Vyrian

USA . 6,636 parts In-Stock

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6,636

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Digiode

USA . 105 parts In-Stock

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105

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Distributors (Availability)

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Parana Technologies

USA . 2,205 parts In-Stock

1+ parts

$9.359

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-

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$9.981

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2,205

$9.359

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$9.981

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IDEA Electronic Components Group

UK . 2,371 parts In-Stock

1+ parts

$10.516

100+ parts

$9.990

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$9.464

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2,371

$10.516

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$9.464

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ChromeModa Solutions

Germany . 495 parts In-Stock

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$10.516

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$8.623

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495

$10.516

$8.623

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AZTECH Wire

Italy . 891 parts In-Stock

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$15.074

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891

$15.074

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One Stop Electronics

USA . 461 parts In-Stock

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$51.000

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461

$51.000

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Corphita

USA . 4,904 parts In-Stock

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Microchip USA

USA . 2,167 parts In-Stock

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DigiPath Technology Company

USA . 193 parts In-Stock

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$9.481

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$9.481

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Overview

Unlock the potential of your electronics with the SN74AUP1G80DCKTG4 by Texas Instruments. As a leading manufacturer in the industry, Texas Instruments delivers top-quality latches & flip-flops that provide reliable performance in various applications. With a compact design and low power consumption, this product offers exceptional value to customers seeking efficiency and precision in their projects. Trust Texas Instruments to take your designs to the next level with innovative solutions that exceed expectations.

Feature Benefit Bullets

Package Body Material: PLASTIC/EPOXY

This material provides durability and protection for the internal components of the latch or flip-flop.

Propagation Delay At Nominal Supply: 28.7 ns

Low propagation delay ensures fast response times and efficient operation of the latch or flip-flop.

Surface Mount: YES

Surface mount capability allows for easy and efficient placement on circuit boards, saving space and simplifying assembly.

Nominal Supply Voltage / Vsup (V): 1.2

Operating at a low nominal supply voltage of 1.2V helps to reduce power consumption and improve efficiency.

Output Characteristics: 3-STATE

3-STATE output allows for high impedance when not actively driving a signal, enabling more flexible circuit designs.

Trigger Type: POSITIVE EDGE

Positive edge trigger enables synchronized data capture and processing, ensuring accurate performance in timing critical applications.

Technology: CMOS

CMOS technology offers low power consumption, high noise immunity, and compatibility with a wide range of supply voltages, making it a versatile choice for latch and flip-flop circuits.

Technical Specifications

Latches & Flip-Flops SN74AUP1G80DCKTG4 attributes and parameters. Explore more Latches & Flip-Flops devices from Texas Instruments

Specs

Family:

AUP/ULP/V

JESD-30 Code:

R-PDSO-G5

JESD-609 Code:

e4

Length:

2 mm

Load Capacitance (CL):

30 pF

Logic IC Type:

Maximum Frequency At Nominal Supply:

260000000 Hz

Maximum I (ol):

4 Amp

Moisture Sensitivity Level (MSL):

1

No. of Bits:

1

No. of Functions:

1

No. of Terminals:

5

Maximum Operating Temperature:

85 Cel

Minimum Operating Temperature:

-40 Cel

Output Characteristics:

3-STATE

Output Polarity:

INVERTED

Package Body Material:

PLASTIC/EPOXY

Package Code:

Package Equivalence Code:

TSSOP5/6,.08

Package Shape:

Package Style (Meter):

SMALL OUTLINE, THIN PROFILE, SHRINK PITCH

Packing Method:

TR

Peak Reflow Temperature (C):

260

Power Supplies (V):

1.2/3.3

Maximum Power Supply Current (ICC):

.0009 mA

Propagation Delay At Nominal Supply:

28.7 ns

Propagation Delay (tpd):

28.7 ns

Qualification:

Not Qualified

Maximum Seated Height:

1.1 mm

Sub-Category:

FF/Latches

Maximum Supply Voltage (Vsup):

3.6 V

Minimum Supply Voltage (Vsup):

.8 V

Nominal Supply Voltage / Vsup (V):

1.2

Surface Mount:

YES

Technology:

CMOS

Temperature Grade:

Terminal Finish:

Nickel/Palladium/Gold (Ni/Pd/Au)

Terminal Form:

Terminal Pitch:

.65 mm

Terminal Position:

DUAL

Maximum Time At Peak Reflow Temperature (s):

NOT SPECIFIED

Trigger Type:

POSITIVE EDGE

Width:

1.25 mm

Minimum fmax:

260 MHz

Trade Compliance

SN74AUP1G80DCKTG4 Logic ICs trade compliance attributes, and parameters.

HTS

8542.39.00.01

SB

8542.39.00.00

PCN

Manufacturer Highlights

Texas Instruments

Texas Instruments Inc. (TI) is one of the world's leading semiconductor companies and a global leader in analog and digital signal processing technology. The company has had a major impact on the electronics industry for over 80 years, manufacturing integrated circuits (ICs), software and subsystems that leverage high-performance computing capabilities. It offers an extensive portfolio of solutions for a wide range of industries, from aerospace to medical devices and consumer products to communication systems. Over its long history, TI has become synonymous with quality, reliability and innovation. Today, TI is one of the largest semiconductor companies in the world with operations in more than 30 countries across six continents.

The material and information contained is this video is for educational and general information purposes. All rights remain with respective rightsholders. Fair Use Statement

Management team

President, CEO

Haviv Ilan

Chairman

Richard K. Templeton

Senior VP, CFO

Rafael R. Lizardi

Manufacturer fab locations 15

Fab name Location Fab Initiation Wafer Capacity

M - Fab

Fabrication

Fab Initiation

1997

USA

South Portland

Wafer Capacity

32,000

1997

32,000

D - FAB

Fabrication

Fab Initiation

1966

USA

Dallas

Wafer Capacity

42,000

1966

42,000

D MOS - 6

Fabrication

Fab Initiation

2002

USA

Dallas

Wafer Capacity

25,000

2002

25,000

D MOS - 5

Fabrication

Fab Initiation

1995

USA

Dallas

Wafer Capacity

75,000

1995

75,000

Miho - 8

Fabrication

Fab Initiation

1980

Japan

Inashiki

Wafer Capacity

43,000

1980

43,000

S FAB 1

Fabrication

Fab Initiation

1966

USA

Sherman

Wafer Capacity

91,000

1966

91,000

F - FAB

Fabrication

Fab Initiation

2001

Germany

Freising

Wafer Capacity

37,000

2001

37,000

R Fab 1

Fabrication

Fab Initiation

2010

USA

Richardson

Wafer Capacity

40,000

2010

40,000

D HC Line

Fabrication

Fab Initiation

1999

USA

Dallas

Wafer Capacity

2,000

1999

2,000

JV3

Fabrication

Fab Initiation

2001

Japan

Aizu Wakamatsu

Wafer Capacity

45,000

2001

45,000

C - FAB

Fabrication

Fab Initiation

2007

China

Chengdu

Wafer Capacity

30,000

2007

30,000

L - Fab

Fabrication

Fab Initiation

2015

USA

Lehi

Wafer Capacity

70,000

2015

70,000

R - Fab 2

Fabrication

Fab Initiation

2022

USA

Richardson

Wafer Capacity

2022

S - FAB 2

Fabrication

Fab Initiation

2025

USA

Sherman

Wafer Capacity

2025

S - FAB 3

Fabrication

Fab Initiation

2028

USA

Sherman

Wafer Capacity

2028

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