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74SSTU32864BFG

Renesas Electronics

74SSTU32864BFG by Renesas Electronics

D FLIP-FLOP; Peak Reflow Temperature (C): 260; JESD-609 Code: e1; Terminal Finish: TIN SILVER COPPER; Packing Method: TRAY; Moisture Sensitivity Level (MSL): 3;

Median Price

$14.046

Lifecycle Status

Suppliers In-Stock

2

In-Stock Inventory

< 1k

Distributors (In-Stock)

Supplier In-Stock 1+ parts 100+ parts 1k+ parts 10k+ parts

Nova Conductors

Japan . 500 parts In-Stock

1+ parts

$14.046

100+ parts

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1k+ parts

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500

$14.046

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Vyrian

USA . 64 parts In-Stock

1+ parts

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1k+ parts

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10k+ parts

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64

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Distributors (Availability)

Supplier In-Stock 1+ parts 100+ parts 1k+ parts 10k+ parts

Native Components

USA . 247 parts In-Stock

1+ parts

$1.090

100+ parts

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1k+ parts

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10k+ parts

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247

$1.090

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Northwest PG Solutions

USA . 814 parts In-Stock

1+ parts

$1.199

100+ parts

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1k+ parts

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814

$1.199

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Microchip USA

USA . 4,133 parts In-Stock

1+ parts

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4,133

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Technical Specifications

Latches & Flip-Flops 74SSTU32864BFG attributes and parameters. Explore more Latches & Flip-Flops devices from Renesas Electronics

Specs

JESD-609 Code:

e1

Logic IC Type:

Moisture Sensitivity Level (MSL):

3

Packing Method:

TRAY

Peak Reflow Temperature (C):

260

Terminal Finish:

TIN SILVER COPPER

Trade Compliance

74SSTU32864BFG Logic ICs trade compliance attributes, and parameters.

HTS

8542.39.00.01

SB

8542.39.00.00

Manufacturer Highlights

Renesas Electronics

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