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74SSTU32864DBFG8

Renesas Electronics

74SSTU32864DBFG8 by Renesas Electronics

D FLIP-FLOP; Packing Method: TR; Terminal Finish: TIN SILVER COPPER; JESD-609 Code: e1; Moisture Sensitivity Level (MSL): 3; Peak Reflow Temperature (C): 260;

Median Price

-

Lifecycle Status

Suppliers In-Stock

1

In-Stock Inventory

< 1k

Distributors (In-Stock)

Supplier In-Stock 1+ parts 100+ parts 1k+ parts 10k+ parts

Vyrian

USA . 37 parts In-Stock

1+ parts

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100+ parts

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1k+ parts

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10k+ parts

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37

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Distributors (Availability)

Supplier In-Stock 1+ parts 100+ parts 1k+ parts 10k+ parts

Native Components

USA . 427 parts In-Stock

1+ parts

$1.228

100+ parts

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1k+ parts

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10k+ parts

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427

$1.228

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Northwest PG Solutions

USA . 1,841 parts In-Stock

1+ parts

$1.350

100+ parts

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1k+ parts

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10k+ parts

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1,841

$1.350

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Technical Specifications

Latches & Flip-Flops 74SSTU32864DBFG8 attributes and parameters. Explore more Latches & Flip-Flops devices from Renesas Electronics

Specs

JESD-609 Code:

e1

Logic IC Type:

Moisture Sensitivity Level (MSL):

3

Packing Method:

TR

Peak Reflow Temperature (C):

260

Terminal Finish:

TIN SILVER COPPER

Trade Compliance

74SSTU32864DBFG8 Logic ICs trade compliance attributes, and parameters.

ECCN

EAR99

ECCN Governance

EAR

HTS

8542.39.00.01

SB

8542.39.00.00

Manufacturer Highlights

Renesas Electronics

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