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EPM7064SLC44-5N

Altera

EPM7064SLC44-5N by Altera

The EPM7064SLC44-5N by Altera is a programmable logic device with 64 macro cells. It operates at a maximum clock frequency of 250 MHz and has a propagation delay of 5 ns. This device is surface mountable and can be programmed in-system. It has 36 I/O lines and supports configurable I/O operation with 3.3V or 5V. The package shape is square with a J bend terminal form. With a package code of QCCJ, it has a maximum seated height of 4.572 mm. This PLD is commonly used for various applications that require programmable logic functions.

Median Price

$88.080

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5

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1k+

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Arrow

USA . 77 parts In-Stock

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Nova Conductors

Japan . 62 parts In-Stock

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$24.840

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Digiode

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Vyrian

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AZTECH Wire

Italy . 315 parts In-Stock

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Corohmni

South Africa . 205 parts In-Stock

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Continental Prestige Electronics

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Corphita

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Ampacity Inc.

Singapore . 55 parts In-Stock

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One Stop Electronics

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Modulus Dynamics

Lithuania . 1 parts In-Stock

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Advanced Electronics

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Texas Native Microelectronics

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$134.242

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$124.845

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Microchip USA

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Semicontronic

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Qasali Group International

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Glotronic Ltd.

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Perfect Parts

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Netroflash

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MARBEL Systems

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Kenton Components

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Overview

Discover the EPM7064SLC44-5N by Altera, a high-quality Programmable Logic Device (PLD) that offers endless possibilities for your projects. With its 64 macro cells and in-system programmability, you can easily customize and optimize your designs. Whether you're working on telecommunications, industrial automation, or consumer electronics, this versatile device delivers exceptional performance with a maximum clock frequency of 250 MHz. Plus, with configurable I/O operation and compatibility with both 3.3V and 5V systems, you have the flexibility to meet your specific requirements. Trust Altera, a renowned manufacturer known for their innovative solutions, and unlock the true potential of your designs today.

Feature Benefit Bullets

Package Body Material: PLASTIC/EPOXY

PLASTIC/EPOXY material is cost-effective and provides good protection for the internal components of the PLD.

Propagation Delay: 5 ns

Low propagation delay of 5 ns ensures fast operation of the Programmable Logic Device.

Maximum Supply Voltage: 5.25 V

Operating with a maximum supply voltage of 5.25 V allows for flexibility and compatibility with various systems.

No. of Macro Cells: 64

Having 64 macro cells provides ample logic resources for designing complex digital circuits.

Technology Used: CMOS

CMOS technology ensures low power consumption and high noise immunity in the PLD.

In-System Programmable: YES

The ability to be programmed in-system allows for easy and convenient reconfiguration of the PLD.

Maximum Clock Frequency: 250 MHz

High maximum clock frequency of 250 MHz enables rapid processing of signals and data in the PLD.

Technical Specifications

Programmable Logic Devices (PLD) EPM7064SLC44-5N attributes and parameters. Explore more Programmable Logic Devices (PLD) devices from Altera

IC Features

Programmable IC Type:

In-System Programmable:

Yes

Organization:

0 Dedicated Inputs, 36 I/O

Output Function:

Macrocell

No. of Macro Cells:

64

No. of Dedicated Inputs:

0

No. of I/O Lines:

36

Maximum Clock Frequency:

250 MHz

Propagation Delay:

5 ns

Technology:

CMOS

Sub-Category:

Programmable Logic Devices

Additional Features:

64 Macrocells; 4 Labs; Configurable I/O operation with 3.3 V or 5 V

Power Characteristics

Nominal Supply Voltage:

5

Minimum Supply Voltage:

4.75 V

Maximum Supply Voltage:

5.25 V

Power Supplies (V):

5 V

Temperature and Environmental Ratings

Maximum Operating Temperature:

70 °C (158 °F)

Minimum Operating Temperature:

0 °C (32 °F)

Temprature Grade:

Peak Reflow Temperature:

245 °C (473 °F)

Moisture Sensitivity Level (MSL):

3

Maximum Time At Peak Reflow Temperature:

40 s

Packaging and Physical Characteristics

Package Body Material:

Plastic/Epoxy

Package Style (Meter):

Chip Carrier

Package Code:

Package Shape:

Package Equivalence Code:

LDCC44,.7SQ

Width:

16.5862 mm

Length:

16.5862 mm

Maximum Seated Height:

4.572 mm

Terminal Characteristcs

Terminal Position:

Quad

Terminal Form:

No. of Terminals:

44

Terminal Pitch:

1.27 mm

Terminal Finish:

Matte Tin/Copper

Standards

JESD-30 Code:

S-PQCC-J44

JESD-609 Code:

e2

JTAG Boundary Scan Test:

No

Qualified:

No

Trade Compliance

EPM7064SLC44-5N Programmable ICs trade compliance attributes, and parameters.

HTS

8542.39.00.01

SB

8542.39.00.00

PCN

Manufacturer Highlights

Altera

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