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XC4025E-4PG299I

Xilinx

XC4025E-4PG299I by Xilinx

FIELD PROGRAMMABLE GATE ARRAY; Form Of Terminal: PIN/PEG; No. of Terminals: 299; Package Code: HPGA; Package Shape: SQUARE; JESD-30 Code: S-CPGA-P299;

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Technical Specifications

Field Programmable Gate Arrays (FPGA) XC4025E-4PG299I attributes and parameters. Explore more Field Programmable Gate Arrays (FPGA) devices from Xilinx

IC Features

Programmable IC Type:

No. of Logic Cells:

1024

No. of Inputs:

256

No. of Outputs:

256

No. of CLBs:

1024

No. of Equivalent Gates:

15000

Maximum Clock Frequency:

111 MHz

CLB Maximum Delay:

2.7 ns

Technology:

CMOS

Sub-Category:

Field Programmable Gate Arrays

Organization:

1024 CLBS, 15000 Gates

Additional Features:

Max usable 25000 Logic gates

Power Characteristics

Nominal Supply Voltage:

5

Minimum Supply Voltage:

4.5 V

Maximum Supply Voltage:

5.5 V

Power Supplies:

5 V

Packaging and Physical Characteristics

Package Body Material:

Ceramic, Metal-Sealed Cofired

Surface Mountable:

No

Package Style:

Grid Array, Heat Sink/Slug

Package Code:

Package Shape:

Length:

52.324 mm

Width:

52.324 mm

Maximum Seated Height:

4.318 mm

Package Equivalence Code:

PGA299,20X20

Terminal Characteristcs

Terminal Position:

Perpendicular

Terminal Style:

Terminal Pitch:

2.54 mm

No. of Terminals:

299

Standards

JESD-30 Code:

S-CPGA-P299

Qualified:

No

Trade Compliance

XC4025E-4PG299I Programmable ICs trade compliance attributes, and parameters.

HTS

8542.39.00.01

SB

8542.39.00.00

Manufacturer Highlights

Xilinx

Xilinx, Inc. (XIlinx) in February 2022 acquired by AMD

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