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60 Latches & Flip-Flops 1

Latches & Flip-Flops
Part# Info Specs
Part RoHS Manufacturer Description Additional Features Count Direction Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Maximum Frequency At Nominal Supply Maximum I (ol) Moisture Sensitivity Level (MSL) No. of Bits No. of Functions No. of Inputs No. of Ports No. of Terminals Maximum Operating Temperature Minimum Operating Temperature Output Characteristics Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style (Meter) Packing Method Peak Reflow Temperature (C) Power Supplies (V) Maximum Power Supply Current (ICC) Propagation Delay (tpd) Qualification Schmitt Trigger Screening Level Maximum Seated Height Sub-Category Maximum Supply Voltage (Vsup) Minimum Supply Voltage (Vsup) Nominal Supply Voltage / Vsup (V) Surface Mount Technology Temperature Grade Terminal Finish Terminal Form Terminal Pitch Terminal Position Maximum Time At Peak Reflow Temperature (s) Total Dose (V) Trigger Type Width Minimum fmax
74LVTH16374ABX,518 by NXP Semiconductors

74LVTH16374ABX,518

NXP Semiconductors

74LVTH16374ABX,518 by NXP Semiconductors is a CMOS latch with a 5 ns propagation delay and operates at 3.3V. It features 16 functions, supports surface mount, and handles up to 64A output current. Ideal for high-speed digital applications in industrial environments.

50 pF

D FLIP-FLOP

150000000 Hz

64 Amp

2

16

60

85 Cel

-40 Cel

3-STATE

PLASTIC/EPOXY

SLGA60,8X12,20

260

3.3

Not Qualified

FF/Latches

3.3

YES

CMOS

INDUSTRIAL

30

POSITIVE EDGE